Arctic Silicon Devices

ASD5020 Multi-Mode 14/12 bit 80/160/320/640 MSPS Analog to Digital Converter
Description The ASD5020 is a versatile high performance low power analog-to-digital converter (ADC), with interleaving modes to increase sampling rate. Integrated Cross Point Switches activate the input selected by the user. In single channel mode, one of the A, B, C or D inputs can be selected as valid input to the 12-bit 640 MSPS ADC. In dual channel mode, any two of the channels A, B, C or D can be selected as valid inputs to the two 12-bit 320 MSPS ADCs. In four channel mode, all 4 inputs are assigned to a 14-bit 80 MSPS or a 12-bit 160 MSPS ADC. The ASD5020 is based on a proprietary structure, and employs internal reference circuitry, a serial control interface and serial LVDS output data. Data and frame synchronization clocks are supplied for data capture at the receiver. Internal digital fine gain can be set separately for each ADC to calibrate for gain errors. Various modes and configuration settings can be applied to the ADC through the serial control interface (SPI). Each channel can be powered down independently and data format can be selected through this interface. A full chip idle mode can be set by a single external pin. Register settings determine the exact function of this pin. ASD5020 is designed to easily interface with Field Programmable Gate Arrays (FPGAs) from several vendors. Contact ASD for Preliminary Datasheet
Features Multiple operational modes Four channel, 12 bit, up to 160 MSPS Two channel, 12 bit, up to 320 MSPS One Channel, 12 bit, up to 640 MSPS SNR: 71 dBFS, SFDR: 65 dBc Precision Mode Four channel, 14 bit, up to 80 MSPS SNR: 74.5 dBFS, SFDR: 85 dBc @ 70 MHz F_IN SNR: 74 dBFS, SFDR: 80 dBc @ 140 MHz F_IN Integrated Crosspoint Switches Ultra Low Power Dissipation 530 mW including I/O at 640 MSPS Internal reference circuitry with no required external components 0.5 µs startup time from Sleep Mode1 15 µs startup time from Power Down Mode Coarse and fine gain control Digital fine gain adjustment for each ADC Internal Offset Correction 1.8 V supply voltage 1.7 - 3.6 V CMOS logic on control interface pins Serial LVDS output 2 x 8, 12 and 14 bit output modes available 7mm x 7mm 48 pin QFN package	Functional Block Diagram
Applications Precision Oscilloscopes Diversity Receivers Software Defined Radio Hi End Ultrasound Communication Testing Non Destructive Testing	Buy Products Contact ASD sales team