Description
The ASD0501
is a high performance ultra low power analog-to-digital converter
(ADC). The ADC employs internal reference circuitry, a CMOS control
interface and CMOS output data, and is based on a proprietary
structure. Digital error correction is employed to ensure no missing
codes in the complete full scale range. Two
idle
modes with fast startup times exist. The entire chip can either be
put in Standby Mode or Power Down mode. The two modes are optimized
to allow the user to select the mode resulting in the smallest
possible energy consumption during idle mode and startup. The ASD0501
has a highly linear THA optimized for frequencies up to Nyquist. The
differential clock interface is optimized for low jitter clock
sources and supports LVDS, LVPECL, sine wave and CMOS clock inputs.
Full
Datasheet
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